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No. Moore's law is stopping hard. No material represents a real advantage over silicon.

Static RAM cells haven't scaled for about two generations now, but you could still scale functional transistors.

Now, even that is stopping. Moore's Law was more an economic law than a physical one.

Exponential growth has to run out sometime.



>Moore's law is stopping hard.

I don't know.. people said the same thing when clock rates got close to 4Ghz. We always seem to find ways to work around physical limits.


Well, that was the beginning of the breakage.

Things actually broke at 90nm. Gate leakage went up enough that most analog/RF circuits scaled their transistors back up to 130-150nm dimensions while the digital guys cashed in the density increase one last time.

65nm was the first node where static RAM cells didn't scale with the rest of the digital circuitry. RAM cells are more sensitive to leakage since they have a "writability constraint" where you have to be able to shove enough electrons from outside the cell, through a transistor, with enough oomph to change the state inside the RAM cell.

40nm was where RAM scaling really broke. Designers had to start jumping through amazing hoops to support tricks for the manufacturing guys to eke out the last jump even for standard digital circuits. Most technologies started trading off multiple gate oxide thicknesses to manage leakage current.

28nm was where everything basically went to hell. The strong form of Moore's Law (twice the transistors for same cost) broke. RAM cells are way off the scaling curve. Leakage is everywhere. Multiple gate oxide thicknesses are the rule, not the exception. Designers are jumping through tremendous hoops for manufacturing (aligning all gates in the same direction over the entire chip, for example).

Below 28nm has been a disaster, and, as pointed out, a lot of the sub-28nm stuff is more marketing than actual physical dimensions.


It would be very helpful if you could cite some sources in your comment. Not all of us are read-up on the past decade of chip fabrication tech.


Here's one showing that 28nm to 16nm RAM doesn't scale at all (by extension, the previous generation 40nm-28nm was the real break from Moore's Law).

http://electroiq.com/blog/2014/02/the-most-expensive-sram-in...


We fixed that problem by dropping back to under 2GHz; focusing on clock rate rather than IPC and energy efficiency was just a stupid time for Intel and the industry.


It was a classic case of the marketing department taking over the farm.


I don't know if we'll halt, but we may have a point where things stagnate for a bit. We've been increasing at breakneck speeds for a very long time.

I don't see that as a bad thing. There's plenty of optimization opportunities on the software level. Think of the difference between first-generation and last-generation console games.


Lots of opportunities throughout the rest of the stack too - from novel architectures to on-chip programmable logic, the end of Moore's law puts more pressure on some really interesting innovation.

eg Rainbow[0], BORPH[1], Mill architecture[2]

[0] http://www.hindawi.com/journals/ijrc/2013/789134/

[1] http://borph.org/

[2] http://millcomputing.com/docs/




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