> wiring diagrams of an extremely basic CPU was part of everyone's CS undergrad at my school (and I assume most other schools too?)
I went to Toronto Metropolitan University (ranked 800-1000 globally) and actually designing that basic CPU was too hard for most students, so they just gave us VHDL code to copy & paste into Quartus II.
Their VHDL code had bugs in it which I discovered after doing the project myself from scratch and comparing my answer with the "correct" one.
This has been the policy for many years now. Shockingly our co-op placement rates have dropped from 70% to 30%.
Hmm well damn, I did go to school a little over a decade ago, so things could have slipped since then. My school seems to be in the low 600s on CWUR[0] which sounds like the same ballpark as Toronto Metropolitan University on those rankings.
I went to Toronto Metropolitan University (ranked 800-1000 globally) and actually designing that basic CPU was too hard for most students, so they just gave us VHDL code to copy & paste into Quartus II.
Their VHDL code had bugs in it which I discovered after doing the project myself from scratch and comparing my answer with the "correct" one.
This has been the policy for many years now. Shockingly our co-op placement rates have dropped from 70% to 30%.