I would agree that bytecode is different from machine code, but "efficient execution by a software interpreter" seems like a bad delineation considering that some virtual machines treat bytecode as simply an intermediate representation for JIT. WASM bytecode is very similar to machine code and meant to be translated to machine code rather than interpreted.
I would define bytecode as:
- Closer to machine operations than something like an AST, which is where I think the "efficient execution" part of the wikipedia definition came from
- Not directly executable on any physical CPU, or at least not typically. There are some CPUs that can execute Java/Python bytecode (sort of) but they're in the minority.
While not strictly required, bytecode tends to have opcodes meant to be used with a virtual machine, such as dealing with objects instead of linear memory.
This is all to say, the proper terminology for RISC-V is an ISA, but the distinction is more about how it's being used than how it's designed.
I would define bytecode as:
- Closer to machine operations than something like an AST, which is where I think the "efficient execution" part of the wikipedia definition came from
- Not directly executable on any physical CPU, or at least not typically. There are some CPUs that can execute Java/Python bytecode (sort of) but they're in the minority.
While not strictly required, bytecode tends to have opcodes meant to be used with a virtual machine, such as dealing with objects instead of linear memory.
This is all to say, the proper terminology for RISC-V is an ISA, but the distinction is more about how it's being used than how it's designed.