This fragmentation was predicted well over a decade ago, but we're finally seeing mass market realization of these predictions.
The most relevant idea here is Koomey's Law [1], which postulates that the "number of computations per joule of energy dissipated doubled about every 1.57 years." This law is essentially a combination of Moore's Law and Dennard scaling. As transistors get smaller, Moore's Law predicts increases in the number of transistors on a chip, while Dennard scaling predicts decreasing power usage per transistor. For many years, Moore's Law really just tracked with Dennard scaling; CPU on-die areas weren't getting substantially larger (to my knowledge), but transistors were getting smaller and more efficient, so more could fit in a given area.
However, Dennard scaling also says that the power density of a transistor remains constant. As transistors became smaller, more of the die became occupied by transistors, causing more heat dissipation per unit area. After exhausting cooling options (think back to the TDP of those CPUs back in the late-90s/early 2000s), Dennard scaling died in the mid-to-late 2000s because of thermal issues.
However, just because heat can't be dissipated doesn't mean CPU manufacturers won't try to cram more and more transistors in a given area. As a result, a modern CPU will not use all its transistors at once because it would overheat, creating "dark silicon". Once in that paradigm, the next logical design approach was prioritizing application-specific transistor clusters, the extent of which we're now seeing.
While I generally agree with the authors, the key in these circumstances is to find ways to combine the fragments and make a better whole. Perhaps we'll have a "brain board" attached to the motherboard, where sockets on the brain board allow user-specific processor cores to be installed. Not everyone needs an i9 or even an i7, and maybe not everyone needs advanced ML performance.
> However, Dennard scaling also says that the power density of a transistor remains constant. As transistors became smaller, more of the die became occupied by transistors, causing more heat dissipation per unit area. After exhausting cooling options (think back to the TDP of those CPUs back in the late-90s/early 2000s), Dennard scaling died in the mid-to-late 2000s because of thermal issues.
Dennard scaling says that power usage per transistor per clock cycle is constant; not power density. As transistors became smaller, an x% reduction in transistor area meant an x% reduction in power per transistor per clock cycle, which allowed clock cycles to increase dramatically to consume the same fixed heat dissipation budget.
The breakdown was not from there being too many transistors per square millimeter, but from the breakdown of the direct relationship of transistor size to power consumption per clock cycle due to current leakage. An x% reduction in transistor area no longer causes an x% reduction in power consumption per clock cycle, meaning operating clock frequency is now fixed at your ability to dissipate heat, not your ability to shrink transistors.
Good point. Leakage current is the main issue these days, but that problem is only indirectly linked to power density.
I've explained it your way in the past, but I saw the Wikipedia article for Dennard scaling [1] says that power density for a transistor remains constant with time, which is true given that the underlying transistor technology has constant resistive losses. My understanding is that transistors using GaN have higher power density than "traditional" transistors, which mean Dennard scaling certainly breaks down.
The dark silicon isn't necessarily application-specific, it's also used by duplicating a particular circuit and then rotating which duplicate does the computing, so that the other areas have time to cool down a bit before they're used again.
The most relevant idea here is Koomey's Law [1], which postulates that the "number of computations per joule of energy dissipated doubled about every 1.57 years." This law is essentially a combination of Moore's Law and Dennard scaling. As transistors get smaller, Moore's Law predicts increases in the number of transistors on a chip, while Dennard scaling predicts decreasing power usage per transistor. For many years, Moore's Law really just tracked with Dennard scaling; CPU on-die areas weren't getting substantially larger (to my knowledge), but transistors were getting smaller and more efficient, so more could fit in a given area.
However, Dennard scaling also says that the power density of a transistor remains constant. As transistors became smaller, more of the die became occupied by transistors, causing more heat dissipation per unit area. After exhausting cooling options (think back to the TDP of those CPUs back in the late-90s/early 2000s), Dennard scaling died in the mid-to-late 2000s because of thermal issues.
However, just because heat can't be dissipated doesn't mean CPU manufacturers won't try to cram more and more transistors in a given area. As a result, a modern CPU will not use all its transistors at once because it would overheat, creating "dark silicon". Once in that paradigm, the next logical design approach was prioritizing application-specific transistor clusters, the extent of which we're now seeing.
While I generally agree with the authors, the key in these circumstances is to find ways to combine the fragments and make a better whole. Perhaps we'll have a "brain board" attached to the motherboard, where sockets on the brain board allow user-specific processor cores to be installed. Not everyone needs an i9 or even an i7, and maybe not everyone needs advanced ML performance.
[1] https://en.wikipedia.org/wiki/Koomey%27s_law