No that's definitely not the case. For digital design, in general, you're not doing anything transistor-level. But those digital designers are using standard cell or memory libraries which are created at a transistor level. I believe the foundries also charge for their own standard cell libraries, and there are many other vendors that a design company can choose from like cadence, synopsys, even ARM.
For analog/RF design, of which there is still an enormous amount, it's always transistor level.
Theoretically, yes, but in practice, no. Creating a manufacturing process is a very complex and time consuming process that takes a huge about of research and development, investment, etc to achieve profitable yields. For bulk CMOS processes, which is what digital circuits are made on, this is especially the case. Foundries like TSMC can't afford to let customers design custom transistors, and customers generally don't have the expertise to do so. There's a huge economies of scale benefit from having customers all use the same process.
That being said, there is a little room for tweaking. The manufacturing process has a ton of variation in it, and the center point / average of that variation can be moved around a little. I think most companies just take what they get, but I'm betting the big players (Qualcomm, Apple, Nvidia, AMD) all do internal tracking of the process variation when they get product back, and give feedback to the foundries to make changes to optimize their own yield.
There's also been a recent push in the very new and advanced processes for "Design-Technology Co-Optimization", where the digital circuit design (i.e. standard cells and memory) and the process technology design happens together. We got here because all of the low hanging fruit has been picked and now companies are chasing single digit percentages in yield and PPA (power, performance, and area) improvements. It's a collaboration between foundry and customer that happens before the process is even released, so again - big players only, and it's still more tweaking than custom transistors.
For other types of processes, meaning non-bulk CMOS, customers can definitely design their own transistors. This is especially common in RF applications where you're often making chips with a few transistors. In some cases, it can be just changes in the shapes and/or dimensions of the transistors in the GDS, relative to what the foundry recommends. For this type of custom transistor, the foundry still controls the material science details of how the process happens. In other cases, though, customers are in control of everything from the transistor dimensions to the chemical concentrations and methods used for fabrication.
For analog/RF design, of which there is still an enormous amount, it's always transistor level.