It's going to offer an incremental improvement in accuracy for the server's derived clock when the reference clock is not affected by that and other sources of jitter.
Beyond the accuracy, the hardware is significantly cheaper and more efficient than a server with a general purpose x86 CPU.
For a dedicated network reference clock, an FPGA or ASIC solution is simply better in every measurable way.
It is more complex, to be sure, but the complexity needn't be your concern.
It's going to offer an incremental improvement in accuracy for the server's derived clock when the reference clock is not affected by that and other sources of jitter.
Beyond the accuracy, the hardware is significantly cheaper and more efficient than a server with a general purpose x86 CPU.
For a dedicated network reference clock, an FPGA or ASIC solution is simply better in every measurable way.
It is more complex, to be sure, but the complexity needn't be your concern.