“Soft” means the CPU is added to your overall design as a block and is compiled along with your design to the FPGA bitstream. This way, the CPU ends up being implemented (instantiated) on the FPGA. This approach eats into your overall FPGA resource budget and leads to lower CPU performance due to the FPGA overhead.
The alternative to a soft core is a “hard” CPU core, which simply means that the CPU is included in a separate area of silicon (usually on the same die). The Zynq 7000 is a good example.
“Soft” means the CPU is added to your overall design as a block and is compiled along with your design to the FPGA bitstream. This way, the CPU ends up being implemented (instantiated) on the FPGA. This approach eats into your overall FPGA resource budget and leads to lower CPU performance due to the FPGA overhead.
The alternative to a soft core is a “hard” CPU core, which simply means that the CPU is included in a separate area of silicon (usually on the same die). The Zynq 7000 is a good example.