Dunno, the M1 CPU package is tiny, thin, power efficient, etc. It's got 4 memory chips inside the package. I don't see any particular reason why a slightly larger package could have 4 memory chips on one side, and 4 chips on the other to double the memory bandwidth and memory size.
However the M1 is already pretty large (16B transistors), upgrading to 8 fast cores is going to significantly increase that. Maybe they will just go to a dual CPU configuration which would double the cores, memory bandwidth, and total ram.
However the M1 is already pretty large (16B transistors), upgrading to 8 fast cores is going to significantly increase that. Maybe they will just go to a dual CPU configuration which would double the cores, memory bandwidth, and total ram.
Or move the GPU and ML accelerator offchip.