The design cycle time is longer. Every prototype requires a formal agreement with one of the fabs you work with, and usually involves a few million dollars changing hands. A few months is usually the minimum.
Even if it's expensive, owning a fab means you have the option to make prototypes of a design, or of parts of a design. You will never, ever do this if you're fabless.
We're good at simulating digital logic, but simulating analog designs is more difficult, and each process tends to have unique quirks. You want your designers to be familiar with these quirks, which is easier to do when everybody designing and using a process is under the same roof.
If you're making a chip that has exotic needs (voltage ranges, threshold voltages, RF performance, noise, thermal properties, bipolar + cmos, etc.) you will have more ability to tweak the process. Foundry type fabs typically offer a smaller "menu" of options that they're comfortable they can support. For example, I think you might have a hard time competing with some of AD's more expensive ADCs as a fabless semiconductor company.
Don't get me wrong... there are plenty of headaches to owning and operating a fab too.
Did everyone with an interest here see the post here [0] a week ago about free fabbing for 130nm open-source chips?
There's certainly the possibility to do analog chips here, but it would take a big team effort.
(have only dabbled a bit with FPGAs with soft-cores, last project I used one for was ~2009: running Linux on an Altera NIOS core, where we sampled at 100 Msps from an input until we filled up the RAM, then more slowly dumped it over Ethernet to a PC)
Being fabless has quite a few advantages too, the cost of building / running a fab is huge, so can only be afforded by major player, or folks who can live on very old process nodes. Most startups, and even ADI themselves use the later nodes like 16nm with external fabs like TSMC.
