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This. In terms of Single Core / Thread Performance we have reached the end of S curve. We haven't had much IPC improvements since Skylake in 2014. We reached the Max Clock speed per normal Cooling possibilities.

Although current rumours suggest 7nm Ocean Cove coming in 2022 with 85% increase of IPC compared to Skylake. I wish we could also make performance node that push through 6Ghz.




Who would possibly believe that 85% IPC increase is on the table for silicon without a wafer sized die?


No-one but (hypothetically) Intel putting a rumour out like that might make people thinking of switching to AMD to hold-off and see.

If I was been cynical.


Well there is 25% from Willow Cove to Skylake, so you are looking at 20% increase from Willow Cove to Golden Cove, and another 20% from Golden Cove to Ocean Cove.

Not entirely impossible. Given some of these improvement has been sitting within Intel for years due to the delay in 10nm.


Not impossible, we are a long way from computronium but I'll believe it when I see it in independent benchmarks.


Apple already has an ~80% IPC lead over Intel. So, me.


Gonna need some heavy sources on that one.

I can make an ALU in an FPGA that only takes in one bit data and adds it. That would take the IPC crown. Is it a useful statement? No. Comparing ARM IPC to x86 IPC is far more complicated than measuring length.


See SPECint2006 in [1] (ctrl-f “absolute performance”). SPECfp is maybe more like a 60% IPC lead, but less relevant to typical users.

I've taken some measurements of the A13's microarchitecture (mostly, its ROB size), and Apple has a bigger lead here than you'd expect. I don't want to share his data without permission, but the bulk of the code is at [2] and I'd be happy to help anyone able to run code on an iDevice repeat the same measurements.

[1] https://www.anandtech.com/show/14892/the-apple-iphone-11-pro...

[2] https://github.com/Veedrac/microarchitecturometer


Sorry, I meant to say “I've taken some measurements of the A13's microarchitecture (mostly, its ROB size) with Andrei Frumusanu from AnandTech”.




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