I appreciate what you're saying, but for devices with long lifetimes things may not be so clear. Consider a wifi device with a >15 year lifetime. Let's say such a device was built with SDR and FPGA, it conformed to 802.11b, and it used twice the power of an equivalent ASIC design. But 15 years later, this device was able to upgrade in software to 802.11ac, and so it was able to take advantage of spatial multiplexing and higher-order modulation to lower its power usage. So now this device uses twice as much power as an equivalent 802.11ac ASIC, but maybe it's more power efficient than that 802.11b ASIC from 15 years earlier.
I guess what I'm saying is that by allowing a device to upgrade in software to more power-efficient designs, you might claw back some of the efficiency lost by using an FPGA when you consider the entire product's lifetime.
> I guess what I'm saying is that by allowing a device to upgrade in software to more power-efficient designs, you might claw back some of the efficiency lost by using an FPGA when you consider the entire product's lifetime.
That presumes you put in a big enough FPGA/CPU or whatever fifteen(!) years in advance that has enough resources to handle the increased processing requirements for a future protocol (expensive and wasteful and there's no guarantee that you didn't guess wrong and it's still too small/slow) and that your RF signal path was designed well enough to handle the new signal requirements (expensive and wasteful even if you were prescient enough to guess what future requirements were). And that's on top of the fact that inexpensive electronic devices simply aren't built with components rated to last 15 years.
Even if all of this works, there is still another issue: a potential rebound effect. If mobile phone software has taught us anything, it is that when updates become cheap, we start getting goodness-knows-how-many patches every other month or even week.
How much bandwidth is wasted on redownloading app "updates" every week that represent a few lines of code change?
... huh, I wonder is that is what happened with DNA and those jumping genes.
I guess what I'm saying is that by allowing a device to upgrade in software to more power-efficient designs, you might claw back some of the efficiency lost by using an FPGA when you consider the entire product's lifetime.