Well, they are quite tiny. A billion transistors fit into the area of your thumbnail. A typical wafer used for lithography has a diameter of 300mm. You can fit quite a few processors on such a wafer and you only have to expose once at each lithography step to create all of them.
I remember back in the 80s when engineers speculated that anything bigger than a 64K DRAM would be impossible because nobody could get that many transistors all working at the same time.
Technology is one challenge. I wonder what other kinds of scaling must take place to sustain such industries? Like, how do you scale learning, so that a single person or a small team is able to have a good overview plus detailed know-how on the these complex devices.
I remember Linus Torvalds mentioning, that while the 386 was a complex CPU, he was able to understand it on a sufficient level. But this time seems to be gone.
It's exactly like software: hierarchical design. You have a number of subsystems on a chip, each one of which has interfaces and resources requirements, the implementation of which is delegated down to teams and individuals or composed from pre-existing pieces.
DRAM is even "easier" because it's just a repeating grid pattern. Tuning the cell design is important for performance, as are the read sense amplifiers at the end of each row, but once the tuning is satisfactory you just get the software to make N copies.
Possibly the most overlooked part of the process is the bits that aren't either taught or written down but passed on in the oral culture of the engineers. Analog IC design is a lot more like this.
"how do you scale learning, so that a single person or a small team is able to have a good overview plus detailed know-how on the these complex devices."
I don't think that there is a single person to understand a modern, complex CPU and its production in full details. Take, for example, a datasheet of modern CPU/SoC -- it's thousands of pages of dense, technical information, and that's already a (comparatively high level) abstraction. As one professor told us in university: technology systems are getting more and more complex very fast, and soon (if not already) the biggest problem will be that noone fully understands how things/infrastructure, our society relies on, works. UML[1] and similar solutions alleviates this problem to some extend.
They, too, wondered that at some point. Even if you have an improbably low fail rate, the defects should break every single chip, right? Turns out, defects in manufacturing chips are not randomly distributed but very much localized. The chances of finding a defect next to another one is larger than finding one anywhere else. Thus, usually only a few chips are affected per wafer.
There are a lot of ways to achieve a higher yield rate, e.g. to increase operating voltages. Although most of the transistors produced could operate at lower voltages, thus being more energy efficient, they tend to apply a higher operating voltage just to be sure that the variances of the manufacturing don't impact the operation.
And there are a lot of other tricks, like identifying corner cases. What are the most affected paths through your ciruits? Or something like this one (don't know if it's still true): Intel never uses the first and last transistor of a row, since they always turn out worse than the others.
Then you start tweaking parameters for a few months and then you hopefully get a fab that can manufacture chips at a yield rate high enough to make a profit.
Current Intel production chips have feature sizes of 14nm, that is about 65 silicon atoms wide and they are hoping to release parts with 10nm early next year. Shrinking much below this size and you would think they would start to see reliability problems even if the chip was produced perfectly.
Articles announcing the end of Moore's law have been written since the early 2000's, but this time it really is different.
NAND flash memory is scaling vertically at the moment, but not exponentially, and not for long. Within one or two doublings of the current layer count we'll be at the limit of what can be achieved without making further sacrifices of horizontal density, or going back to the drawing board on how 3D NAND is done. This is because 3D NAND is not manufactured like 2D NAND layers stacked one at a time. The features that run through the whole stack are hitting aspect ratios in excess of 50:1, and that can't be stretched too much further.
Although I'd expect the number of transistors manufactured to keep growing for some time... the exponential growth of this "collective pursuit" appears to be limited. I wouldn't even claim that it is necessarily limited by technology (although it appears to be), but it is certainly limited by investment.
Since investment typically follows the ITRS roadmap, announcements like this have a huge effect on future growth.
If we are currently at 35B transistors per person on earth produced per year, back-of-the-envelope calculated, in 2025, we will probably have 200B transistors per person running on this planet. Or about two DGX-1 for every single human.
TLDR: The chart attempts to show the relationship between Transistors Produces per Year and Transistor Cost per Year, but confuses the relationship by denoting the latter quantity in units that require mental multiplication to understand (transistor per $1.0 * $0.000000001)
---
I see two curves, red ("Transistors Made Per Year") and black (Price Per Transistor (Billionths of $1)), both plotted versus a common range - "years," - with plot-lines horizontally and vertically to help me trace points on the curve to their respective values.
Thank you, authors, for providing labels for the horizontal scale-lines on the graph (the vertical axes). You've understood that I might want to understand the relationship between different pairings of points between the red and black curves, and the horizontal lines help me rapidly estimate y-values for both. Or at least for the left-side y-axis (the red curve): "Transistors Made Per Year."
To be honest, I'm having difficulty relating the the quantities denoted in the units of the right-hand y-axis (the black curve), "Price Per Transistor (Billionths of $1)," with both the red curve AND the x-axis.
Here's why:
I had trouble efficiently internalizing what the units of the black curve - "Price Per Transistor (Billionths of $1)" - really meant. I am lazy, so I only figured it out on the third paragraph of my comment. I kept glancing at the red curve, then the black curve and thinking something like "ok... in 1965 it looks like the red curve was about 10^9 "Transistors made that year"... and for the black curve, it was $10 Billion per Transistor... oh wait. I mean ($10 Billion * $0.000000001) per Transistor. So I guess thats.... uh... $10/Transistor($1)? I.e. each transistor cost $10 and $10 billion were made total that year (ah ha, for a total silicon market cap of $10/transistor * 10,000,000,000 transistor = $100B).
Please don't make us do math to understand the units of one of the axis, if possible.
Also, labels to denote the values of the vertical gridlines (ticks on the x-axis) would have been helpful. Without them, we have to mentally estimate their value by subtracting the high-side of the domain from the low-side, then dividing by the number of tick marks (alternatively, counting from 0 the number of vertical lines across the whole graph. In this case: (2014 - 1955)/(11 tick marks + 1) = 4.9266666... years ~5 years.
That said, I'm pleased to see more transistors were manufactured in the last year than there are stars in several galaxies! Wow. But Kanye won't be impressed until the number exceeds the number of all KNOWN STARS in the UNIVERSE. So keep at it.
Lastly... Isn't VLSI so 80's? Isn't there a VLSIVLSI now or something? Maybe VLSI^2?
> Lastly... Isn't VLSI so 80's? Isn't there a VLSIVLSI now or something? Maybe VLSI^2?
The progress from discrete transistors to small-scale integration up through VLSI brought with it major changes in what kind of functionality could be integrated on a single device. That's mostly stopped: early VLSI chips were things like CPUs, and our largest chips today are still usually just processors (or FPGAs) with a similar role in the system as a whole. We've integrated all the co-processors and much of the I/O onto SoCs that largely aren't pushing the limits of transistor count or die size, and there are some instances of bringing more analog stuff like some power regulation and radios onto the chip. But for the most part, we're still using separate chips for the processor and the RAM and a bunch of smaller chips for various I/O tasks, even on tiny embedded systems like smartphones.
I thought one of Carver Mead's main motivations for developing VLSI with his students was that at the time, designing and fabbing a bespoke single silicon device (comprised of networks of many transistors) to implement a particular "program" was much harder than designing and building the same functionality from a "macro-network" of pre-existing, off-the-shelf, catalog transistor devices.
I.e., it was easier to implement the logic for a traffic stop-light or an electronic calculator or a television remote-control by assembling a circuit from off-the-shelf components than it was to implement the same transistor logic in a single integrated circuit.
It was definitely possible to do the latter in the early/mid 70's, but not as economical.
Your comment points out that SoCs are the modern pinnacle of implementing everything "in silicon" - yet are we not also still implementing "the other half" of the system with circuits of many off-the-shelf ICs? I.e. one IC is CPU+Memorycache, another is RAM, a third is wifi module, etc.
"The SAM B11 is an ultra-low power Bluetooth® SMART (BLE 4.1) System on a Chip with Integrated MCU, Transceiver, Modem, MAC, PA, TR Switch, and Power Management Unit (PMU). It is a standalone ARM® Cortex®-M0 applications processor with embedded Flash memory and BLE connectivity."
Smartphones are tiny embedded systems in the sense that they are embedded systems, and their total circuit board area is a small multiple of the die size of their larger chips. They're physically quite space-constrained and don't have room for very many separate components, and the larger ones usually end up stacked.
Non-humans maybe (t/quad)rillionaires to eclipse us within our lifetimes because of the likelihood of runaway technological acceleration.
At the 1e9m systematic level, inorganic and hybrid sentient, self-replicating, self-improving systems seem an inevitable stage enabled by organic life.
Not necessarily. Japan recovered from nearly deforestation a-la Easter Island. Penalties and enforcement are required to prevent consequences of individual and collective externalities.
What AI? There is no AI at present, and no known way of making one. The "AI" we have now is all specialized to a single field, there are none that can generalize like humans - or even animals.
Just large numbers should not concern you - there are far more bacteria than transistors.
The number given in the article is really not that big considering that most of these transistors are made as part of integrated circuits rather than in the form of discrete components. A modern large-scale integrated circuit can easily contain more than a few million transistors each.
You are off by a factor of 1000. Top end CPUs and GPUs are in the billions of transistors. I believe 8Gb DRAMs are shipping commercially now (so 8G transistors and then some)
Sure, but this only supports a simple point I tried to make. Let me try again: today transistors are so small and appear in such large quantities as part of large-scale integrated circuits that counting them is almost like counting molecules (or, let's say, bacteria, as one commenter has pointed out earlier). Such "astronomical scales" make for catchy headlines, but that's about it. (Not a very interesting observation on my part, I admit.)
