| | FPGA Conference in UK (adiuvoengineering.com) |
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2 points by checker659 10 days ago | past | discuss
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| | Cordic Algorithm from Scratch in FPGA (adiuvoengineering.com) |
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2 points by signalhound 20 days ago | past
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| | Understanding Linear Feedback Shift Registers in FPGAs (adiuvoengineering.com) |
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74 points by signalhound 10 months ago | past | 22 comments
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| | Deep dive of Agilex 5 Architecture (adiuvoengineering.com) |
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2 points by signalhound 10 months ago | past
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| | Debugging FPGAs with Python (adiuvoengineering.com) |
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1 point by signalhound 10 months ago | past
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| | Not Just for AI, Developing for AMD Versal AI Engines Using Simulink for 2D FFTs (adiuvoengineering.com) |
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2 points by signalhound 10 months ago | past
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| | A look at working with AMD Alveo accelerators and Python (adiuvoengineering.com) |
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1 point by signalhound 10 months ago | past
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| | Learn about AMD Versal, Network on Chip and Ddrmc (adiuvoengineering.com) |
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1 point by signalhound 10 months ago | past
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| | The Cordic Algorithm, Theory and FPGA Uses (adiuvoengineering.com) |
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23 points by signalhound 10 months ago | past | 6 comments
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| | A Look at the OpenNIC a SmartNIC from AMD (adiuvoengineering.com) |
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1 point by signalhound 10 months ago | past
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| | Understanding DFT and FFT (adiuvoengineering.com) |
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29 points by signalhound 10 months ago | past | 5 comments
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| | PCEi, AMD FPGA, DMA and How to Write the SW (adiuvoengineering.com) |
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1 point by signalhound 11 months ago | past
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| | Using Embedded Linux for Motor Control on FPGA (adiuvoengineering.com) |
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2 points by signalhound 11 months ago | past
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| | Debugging AMD Versal (adiuvoengineering.com) |
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1 point by signalhound 11 months ago | past
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| | Understanding PCIe Base Address Registers – Using Alveo as an Example (adiuvoengineering.com) |
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1 point by signalhound 11 months ago | past
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| | Adding HDL into Vivado IP Integrator Cleanly (adiuvoengineering.com) |
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1 point by signalhound 11 months ago | past
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| | Auto Running Scripts and Applications in Embedded Linux (adiuvoengineering.com) |
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1 point by signalhound 12 months ago | past
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| | FPGA, PCIe and XDMA – Building and Testing AMD SW Drivers (adiuvoengineering.com) |
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41 points by signalhound on Jan 26, 2024 | past | 4 comments
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| | Getting Up and Going with the AMD KRIA K24 SoM (adiuvoengineering.com) |
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1 point by signalhound on Jan 24, 2024 | past
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| | Building AMD Versal AI Edge Blog and Video (adiuvoengineering.com) |
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1 point by signalhound on Jan 17, 2024 | past
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| | Using Alveo Cards Outside the Datacentre – Building PCIe (adiuvoengineering.com) |
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1 point by signalhound on Jan 15, 2024 | past
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| | Lots of resources to get started learning FPGA (adiuvoengineering.com) |
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3 points by signalhound on Jan 10, 2024 | past
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| | GateMate European FPGA and open source tool chain (adiuvoengineering.com) |
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3 points by signalhound on Jan 8, 2024 | past
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| | Versal AI Edge – FPGA and AI Accelerate at more sensible price point (adiuvoengineering.com) |
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2 points by signalhound on Jan 3, 2024 | past
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| | IT Infrastructure and Tools for a FPGA Start Up (adiuvoengineering.com) |
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2 points by signalhound on Dec 27, 2023 | past
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| | Selecting the Right Alveo FPGA Accelerator Card (adiuvoengineering.com) |
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1 point by signalhound on Dec 15, 2023 | past
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| | Five Points to stop you Fucking up your FPGA design (adiuvoengineering.com) |
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1 point by signalhound on Dec 6, 2023 | past
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| | Designing Alveo Using Vivado (adiuvoengineering.com) |
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1 point by signalhound on Dec 1, 2023 | past
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| | Adiuvo Launches Board with Spartan 7 FPGA and RP2040 (adiuvoengineering.com) |
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9 points by signalhound on Nov 29, 2023 | past
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| | Vitis Moves from Eclipse to VSCode (adiuvoengineering.com) |
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2 points by signalhound on Nov 1, 2023 | past
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More |
