A 486SX never delegates floating point instructions, the 487 is a full 486DX that disables the SX and fully takes over, you are thinking of 386 and older.
I did notice from the article that reading is destructive, so every time you read (or at least every time you read a 0), you have to re-write it out. I wonder how much that affects the practical durability.
Yes, since reads destroy the data, each read causes a write. The chip will handle 100 trillion read/writes. So yes, the chip will wear out rapidly if you do a lot of reads.
I can't really think of a use case where this could plausibly come up. It would take 3 years if you read the same memory location (uncached) 1 million times a second.
There are multiple factors that limit the number of writes that FRAMs can handle: changes in crystal structure as Ti ions replace O, mobile ions collecting at grain boundaries, and something to do with 90º domains.
Reading destroys the stored value; it doesn't necessarily destroy the physical material.
Reading from memory is already destructive in DRAM (capacitor gets discharged), magnetic core memory (need to alter the magnetization state to read out how much energy was needed), and probably other technologies as well.
It's not an oracle, and does get things wrong occasionally, but if anything, having to check its responses actually helps me confirm that I'm learning.
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