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Equipment for ion implantation already includes mini accelerators [1] [2]. The semiconductor equipment industry in general has many machines that feel like they came out of a physics lab into a semi fab. For example, plasma dry-etching or deep-reactive ion etching. EUV litho is just one of many very interesting problems--currently the bottleneck so it's talked about a lot.

[1] https://en.wikipedia.org/wiki/Ion_implantation [2] https://www.axcelis.com/products/purion-xe-series-high-energ...

edit: add link to cool ion implanter machine pics


You also need hundreds of other machines from Applied Materials, KLA Tencor, Lam Research, Tokyo Electron, etc. Then, years of process development R&D: what temperature do we bake this layer at, how long, what profile, what atmosphere in the tool… Every process step has a large parameter set to optimize. Creating a process is a painstaking many many variable optimization slog.

Just wanted to add that since I see people only mention ASML often here. They are very important, but there is so much more to TSMC’s success.


You are absolutely correct that design costs swamp mask costs by far. For 7 nm, it costs more than $271 million for design alone (EDA, verification, synthesis, layout, sign-off, etc) [1], and that’s a cheaper one. Industry reports say $650-810 million for a big 5 nm chip.

[1] https://semiengineering.com/racing-to-107nm/


I built the Gameslab around this concept, but haven’t worked on it much lately.

https://craigjb.com/2019/11/26/gameslab-overview/


Keep in mind, a semiconductor fab has hundreds of other machines and equipment involved, and US companies are some of the biggest suppliers (Applied Materials, Lam Research, KLA-Tencor--all multi-billion dollar companies).

Lithography is definitely key, but all the equipment and process must work together.


TSMC's plans for Arizona have been increased to start with 100k per month with future phases up to 200k [1]

[1] https://technosports.co.in/2021/03/03/tsmc-to-build-5nm-plan...


The ASML lithography machine is just one, very important, machine out of many dozens. A semiconductor fab process involves 100s-1000s of process steps each with dozens to hundreds of parameters. For example, something as simple as rinsing a wafer after an etch step:

- How long to rinse

- What to rinse with (DI water, solvent, etc)

- What temperature to rinse at

- Should the temperature change over time?

- Agitated vs. non-agitated

It may sound small, but a bad rinse process will tank yields and make the whole process fail.

In a huge semiconductor company like Intel or TSMC, multiple process engineers specialize on each one of these steps out of hundreds. These are truly massive undertakings.


Microchip has the product for you then! Well, the RiscV part anyway. https://www.microsemi.com/product-directory/soc-fpgas/5498-p...


The biggest impact for me I think is the lack of ability to export STEP for KiCad 3D models.


I actually have to disagree. I think it really depends on who you follow. For a long time I didn't use twitter at all, but I've recently become active.

The hardware hacker community (think Hackaday types) on Twitter is pretty awesome and a lot of fun to follow.

Stuff like the below comes through all the time, and the discussions with people making things are great.

https://twitter.com/MrRobotBadge/status/1212038632246251520 https://twitter.com/johndmcmaster/status/1211923709910376449 https://twitter.com/mifune/status/1168604582748073986


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