Submissions from github.com/spinalhdl

		A FPGA friendly 32 bit RISC-V CPU implementation (github.com/spinalhdl)
		116 points by _benj 4 days ago \| past \| 50 comments
		SpinalHDL – A high level hardware description language based on Scala (github.com/spinalhdl)
		2 points by losfair on April 21, 2022 \| past
		SpinalHDL: Write Scala, Get VHDL/Verilog (github.com/spinalhdl)
		3 points by andersson42 on July 20, 2017 \| past
		An FPGA-friendly 32-bit RISC-V CPU implementation (github.com/spinalhdl)
		102 points by Dolu on July 19, 2017 \| past \| 43 comments